3-dimensional integration of VLSI circuits - technical, challenges and opportunities

Supervisor
Prof. Eby Friedman
Place:
Technion, EE building, Auditorium 1003 (10th floor)
Date:
24.2.11
Abstract:

You are kindly invited to a Workshop on :

3-dimensional integration of VLSI circuits - technicalchallenges and opportunities

Thursday, 24 Feb 2011, 14:30-17:30 

Auditorium Floor 10

 

 

 
14:15 - 14:30

Registration & Light Refreshments

14:30 - 15:10

Recent Research in 3-D Circuit Design and Related Test Circuits
Prof. Eby G. Friedman, University of Rochester, NY, USA

15:10 - 15:50

Variability Issues in 3-D Clock Distribution Networks
Prof. Vasilis Pavlidis, EPFL, Switzerland

15:50 - 16:10


Coffee Break


16:10 - 16:50
Design and Modeling Methodology of Vertical Interconnects (TSV, mC4...) for 3DI technologies in IBM
Dr. David Goren, IBM, Israel

16:50 - 17:30

Cost Effectiveness of 3D Integration Options
Prof. Dimitrios Velenis, IMEC, Belgium
 
Register
  • Marvel
  • Zoran
  • Texas Instruments
  • Mellanox
  • Intel